1. Field of the Invention
The invention relates to an electronic device, and more particularly to a controller for updating parameters in an electronic device.
2. Description of the Related Art
FIG. 1 shows a display controller for a typical LCD (Liquid Crystal Display). Referring to FIG. 1, the display controller 11 includes a flash memory (also referred to as FLASH) 112, a programming circuit 111, an embedded SRAM (Static Random Access Memory) 113, a MCU (Micro Computer Unit) 114, a memory controller 115, an external I/O controller 116 and a video processing unit 117. The current LCD uses an external accessible non-volatile memory 13, such as an electrically erasable programmable read only memory (EEPROM), for storing variable parameters. The program executed by the MCU 114 is written into the flash memory 112 through the programming circuit 111 using an external host 12. The programming circuit 111 accesses the flash memory 112 through a plurality of address/data signals A/D1 and a plurality of control signals CS1. In addition, the memory controller 115 also accesses the flash memory 112 and the embedded SRAM 113 through the address/data signals A/D1 and the control signals CS1.
When the LCD is working, the parameters may be modified by the user, and the modified parameters have to be held when the power is off. Thus, the MCU 114 of the display controller 11 utilizes the memory controller 115 and the external I/O controller 116 to write the parameters into the external non-volatile memory 13. As shown in FIG. 1, the user operates a human-machine interface to generate a user input signal. The MCU 114 processes the user input signal into parameters according to the program code, and the parameters are stored in the external non-volatile memory 13. Because the external non-volatile memory 13 is disposed outside the display controller 11, the system cost is increased.
In addition, U.S. Pat. No. 6,421,279, entitled “Flash memory control method and apparatus processing system therewith” and U.S. Pat. No. 6,904,400, entitled “Flash EEPROM memory emulator of non-flash EEPROM device and corresponding method” have disclosed methods of emulating the access to the EEPROM using the typical flash memory. FIG. 2 shows the architecture of emulating the EEPROM using the flash memory. Referring to FIG. 2, the memory architecture 21 includes a flash memory 212, a MCU 114, a memory controller 215, an address matching controller 218 and a buffer 219. In the prior art, additional circuits including the address matching controller 218 and the buffer 219 are used to emulate the access of EEPROM using the flash memory 212. The address matching controller 218 controls the used region of the flash memory 212.